Dit is een 2e KANS artikel/product, en is getest op werking/functionaliteit!
— GARANTIE 14 dagen na aankoop —
General information |
Type |
CPU / Microprocessor |
Family |
Intel Pentium Dual-Core |
Processor number ? |
E6700 |
Part number |
AT80571PH0882ML BX80571E6700 BXC80571E6700 |
Frequency (GHz) ? |
3.2 |
Bus speed (MHz) ? |
1066 |
Clock multiplier ? |
12 |
Package type |
775-land FC-LGA8 |
Socket type |
Socket 775 (LGA775) |
Architecture / Microarchitecture / Other |
CPUID |
01067Ah |
Core stepping |
R0 |
Processor core |
Wolfdale-3M |
Manufacturing technology (micron) |
0.045 |
Number of cores |
2 |
L2 cache size (MB) ? |
2 |
Features |
EM64T technology ? Enhanced SpeedStep technology ? Execute disable bit ? Extended Halt state Extended Stop Grant state Thermal Monitor 2 Virtualization technology |
Core voltage (V) ? |
0.85 – 1.3625 |
Case temperature (°C) ? |
74.1 |
Thermal Design Power (Watt) ? |
65 |
SLGUF CPUID information
Intel Pentium Dual-Core E6700 SLGUF |
Part number: |
AT80571PH0882ML |
Measured Frequency: |
3192 MHz |
|
Comment: |
|
Submitted by: |
HECTOROFF |
|
|
General information
Vendor: |
GenuineIntel |
Processor name (BIOS): |
Pentium(R) Dual-Core CPU E6700 @ 3.20GHz |
Cores: |
2 |
Logical processors: |
2 |
Processor type: |
Original OEM Processor |
CPUID signature: |
1067A |
Family: |
6 (06h) |
Model: |
23 (017h) |
Stepping: |
10 (0Ah) |
TLB/Cache details: |
64-byte Prefetching Data TLB: 4-KB Pages, 4-way set associative, 256 entries Data TLB: 4-MB Pages, 4-way set associative, 32 entries Instruction TLB: 2-MB pages, 4-way, 8 entries or 4M pages, 4-way, 4 entries Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries L1 Data TLB: 4-KB pages, 4-way set associative, 16 entries L1 Data TLB: 4-MB pages, 4-way set associative, 16 entries |
Cache details
Cache: |
L1 data |
L1 instruction |
L2 |
Size: |
2 x 32 KB |
2 x 32 KB |
2 MB |
Associativity: |
8-way set associative |
8-way set associative |
8-way set associative |
Line size: |
64 bytes |
64 bytes |
64 bytes |
Comments: |
Direct-mapped |
Direct-mapped |
Non-inclusive Direct-mapped Shared between all cores |
Supported instructions
Instruction set extensions |
Additional instructions |
MMX |
CLFLUSH |
SSE |
CMOV |
SSE2 |
CMPXCHG16B |
SSE3 |
CMPXCHG8B |
SSSE3 |
FXSAVE/FXRSTORE |
|
MONITOR/MWAIT |
|
SYSENTER/SYSEXIT |
|
XSAVE/XRESTORE states |
|
XSETBV/XGETBV are enabled |
Integrated features and technologies
Major features |
Other features |
On-chip Floating Point Unit |
36-bit page-size extensions |
64-bit / Intel 64 |
64-bit debug store |
NX bit/XD-bit |
Advanced programmable interrupt controller |
Intel Virtualization |
CPL qualified debug store |
Enhanced SpeedStep |
Debug store |
|
Debugging extensions |
|
Digital Thermal Sensor capability |
|
LAHF/SAHF support in 64-bit mode |
|
Machine check architecture |
|
Machine check exception |
|
Memory-type range registers |
|
Model-specific registers |
|
Page attribute table |
|
Page global extension |
|
Page-size extensions (4MB pages) |
|
Pending break enable |
|
Perfmon and Debug capability |
|
Physical address extensions |
|
Self-snoop |
|
Thermal monitor |
|
Thermal monitor 2 |
|
Thermal monitor and software controlled clock facilities |
|
Time stamp counter |
|
Virtual 8086-mode enhancements |
|
xTPR Update Control |
|