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Beschrijving
| Dit is een 2e KANS artikel/product, en is getest op werking/functionaliteit! — GARANTIE 14 dagen na aankoop — |
| General information | |
| Type | CPU / Microprocessor |
| Family | Intel Pentium Dual-Core |
| Processor number ? | G4500 |
| Part number | CM8066201927319 BX80662G4500 BXC80662G4500 |
| Frequency (GHz) ? | 3.5 |
| Clock multiplier ? | 35 |
| Package type | 1151-land FC-LGA14C |
| Socket type | Socket 1151 |
| Architecture / Microarchitecture / Other | |
| Core stepping | S0 |
| Processor core | Skylake-S |
| Manufacturing technology (micron) | 0.014 |
| Number of cores | 2 |
| L2 cache size (KB) ? | 512 |
| L3 cache size (MB) | 3 |
| Features | AES EM64T technology ? Enhanced SpeedStep technology ? Execute disable bit ? MMX SSE SSE2 SSE3 SSE4 SSSE3 Virtualization technology (VT-d) Virtualization technology (VT-x) |
| Case temperature (°C) ? | 100 |
| Thermal Design Power (Watt) ? | 51 |
| Notes on sSpec SR2HJ | |
| The processor supports DDR3L-1600 memory.The processor supports DDR4-2133 memory.Direct Memory Interface speed is 8 GT/s.Frequency of integrated graphics controller in turbo mode is 1050 MHz.Integrated graphics controller runs at 350 MHz. | |
Related S-Spec numbers
In addition to the SR2HJ S-Spec, this processor was also manufactured with one pre-production S-Spec number:
| Stepping | S-Spec | CM8066201927319 | BX80662G4500 | BXC80662G4500 | Unknown |
|---|---|---|---|---|---|
| S0 | QJZJ | + | |||
| SR2HJ | + | + | + |
NOTE: Engineering and qualifications samples are marked with this color
SR2HJ CPUID information
View / search public CPUID submissions
| Intel Pentium Dual-Core G4500 SR2HJ | |
|---|---|
| Part number:CM8066201927319Measured Frequency:3503 MHz | Comment:Submitted by:gshv |
General information
| Vendor: | GenuineIntel |
| Processor name (BIOS): | Intel(R) Pentium(R) CPU G4500 @ 3.50GHz |
| Cores: | 2 |
| Logical processors: | 2 |
| Base frequency: | 3500 MHz |
| Maximum frequency: | 3500 MHz |
| Bus / reference frequency: | 100 MHz |
| Processor type: | Original OEM Processor |
| CPUID signature: | 506E3 |
| Family: | 6 (06h) |
| Model: | 94 (05Eh) |
| Stepping: | 3 (03h) |
| TLB/Cache details: | 64-byte Prefetching Data TLB: 1-GB pages, 4-way set associative, 4 entries Data TLB: 4-KB Pages, 4-way set associative, 64 entries Instruction TLB: 4-KByte pages, 8-way set associative, 128 entries L2 TLB: 1-MB, 4-way set associative, 64-byte line size Shared 2nd-Level TLB: 4-KB / 2-MB pages, 6-way associative, 1536 entries. Plus, 1-GB pages, 4-way, 16 entries |
Cache details
| Cache: | L1 data | L1 instruction | L2 | L3 |
|---|---|---|---|---|
| Size: | 2 x 32 KB | 2 x 32 KB | 2 x 256 KB | 3 MB |
| Associativity: | 8-way set associative | 8-way set associative | 4-way set associative | 12-way set associative |
| Line size: | 64 bytes | 64 bytes | 64 bytes | 64 bytes |
| Comments: | Direct-mapped | Direct-mapped | Non-inclusive Direct-mapped | Inclusive Shared between all cores |
Supported instructions
| Instruction set extensions | Additional instructions | ||
|---|---|---|---|
| MMX | Advanced Bit manipulation | ||
| SSE | CLFLUSH | ||
| SSE2 | CLFLUSHOPT | ||
| SSE3 | CMOV | ||
| SSSE3 | CMPXCHG16B | ||
| SSE4.1 | CMPXCHG8B | ||
| SSE4.2 | Enhanced REP MOVSB/STOSB | ||
| AES | FXSAVE/FXRSTORE | ||
| Software Guard Extensions (SGX) | INVPCID | ||
| MONITOR/MWAIT | |||
| MOVBE | |||
| PCLMULDQ | |||
| POPCNT | |||
| PREFETCH/PREFETCHW | |||
| RD/WR FSGSBASE instructions | |||
| RDRAND | |||
| RDSEED | |||
| RDTSCP | |||
| SYSENTER/SYSEXIT | |||
| XSAVE/XRESTORE states | |||
| XSETBV/XGETBV are enabled |
Integrated features and technologies
| Major features | Other features | ||
|---|---|---|---|
| On-chip Floating Point Unit | 1 GB large page support | ||
| 64-bit / Intel 64 | 36-bit page-size extensions | ||
| NX bit/XD-bit | 64-bit debug store | ||
| Intel Virtualization | Advanced programmable interrupt controller | ||
| Enhanced SpeedStep | CPL qualified debug store | ||
| Clock modulation duty cycle extension | |||
| Debug store | |||
| Debugging extensions | |||
| Digital Thermal Sensor capability | |||
| Extended xAPIC support | |||
| Intel Processor Trace | |||
| LAHF/SAHF support in 64-bit mode | |||
| Machine check architecture | |||
| Machine check exception | |||
| Memory-type range registers | |||
| Model-specific registers | |||
| Package thermal management | |||
| Page attribute table | |||
| Page global extension | |||
| Page-size extensions (4MB pages) | |||
| Pending break enable | |||
| Perfmon and Debug capability | |||
| Physical address extensions | |||
| Power Limit Notification capability | |||
| Process context identifiers | |||
| Self-snoop | |||
| Supervisor-Mode Access Prevention and CLAC / STAC instructions | |||
| TSC rate is ensured to be invariant across all states | |||
| Thermal monitor | |||
| Thermal monitor 2 | |||
| Thermal monitor and software controlled clock facilities | |||
| Time stamp counter | |||
| Timestamp counter deadline | |||
| Virtual 8086-mode enhancements | |||
| xTPR Update Control |
Extra informatie
| Gewicht | 100 g |
|---|---|
| Afmetingen | 4 × 4 × 0,7 mm |
| Processor familie | |
| Thermal Design Power (Watt) | |
| Processor nummer | |
| Processor kern (naam) | |
| Aantal kernen | |
| Instructieset | |
| Frequentie processor (GHz) | |
| Bus snelheid (MHz) | |
| L1 cache size (KB) | |
| Bouwjaar | |
| L2 cache size (MB) | |
| L3 cache size (MB) | |
| Package type | |
| Socket type | |
| Lithografie (nm) |
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