Processor Intel Core i3-3240 3.4 GHz Socket 1155 SR0RH (2e kans)

Beschrijving

Dit is een 2e KANS artikel/product, en is getest op werking/functionaliteit! — GARANTIE 14 dagen na aankoop —

General information
Type	CPU / Microprocessor
Family	Intel Core i3
Processor number  ?	i3-3240
Part number	CM8063701137900 BX80637I33240 BXC80637I33240
Frequency (GHz)  ?	3.4
Clock multiplier  ?	34
Package type	1155-land FC-LGA12C
Socket type	Socket 1155 (LGA1155)
Architecture / Microarchitecture / Other
Core stepping	L1
Processor core	Ivy Bridge
Manufacturing technology (micron)	0.022
Number of cores	2
L2 cache size (KB)  ?	512
L3 cache size (MB)	3
Features	AVX EM64T technology  ?  Enhanced SpeedStep technology  ?  Execute disable bit  ?  Hyper-Threading technology MMX SSE SSE2 SSE3 SSE4 SSSE3 Virtualization technology (VT-x)
Thermal Design Power (Watt)  ?	55
Notes on sSpec SR0RH
Integrated graphics controller runs at 650 MHz.The part supports DDR3-1333 and DDR3-1600 memory.Frequency of integrated graphics controller in turbo mode is 1050 MHz.Direct Memory Interface speed is 5 GT/s.The part is discontinued. Last order date is Jun 26, 2015. Last shipment date is Dec 04, 2015.

Related S-Spec numbers

In addition to the SR0RH S-Spec, this processor was also manufactured with two pre-production S-Spec numbers:

Stepping	S-Spec	CM8063701137900	CM8063701247800	BX80637I33240	BXC80637I33240
L1	QC8J	+
	SR0RH	+		+	+
P0	QCFX		+

NOTE: Engineering and qualifications samples are marked with this color

SR0RH CPUID information

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Intel Core i3 i3-3240 SR0RH
Part number:CM8063701137900Measured Frequency:3391 MHz	Comment:Submitted by:CPU-World

General information
Vendor:	GenuineIntel
Processor name (BIOS):	Intel(R) Core(TM) i3-3240 CPU @ 3.40GHz
Cores:	2
Logical processors:	4
Processor type:	Original OEM Processor
CPUID signature:	306A9
Family:	6 (06h)
Model:	58 (03Ah)
Stepping:	9 (09h)
TLB/Cache details:	64-byte Prefetching Data TLB0: 2-MB or 4-MB pages, 4-way set associative, 32 entries Data TLB: 4-KB Pages, 4-way set associative, 64 entries Instruction TLB: 4-KB pages, 4-way set associative, 64 entries L2 TLB: 1-MB, 4-way set associative, 64-byte line size Shared 2nd-level TLB: 4 KB pages, 4-way set associative, 512 entries

Cache:	L1 data	L1 instruction	L2	L3
Size:	2 x 32 KB	2 x 32 KB	2 x 256 KB	3 MB
Associativity:	8-way set associative	8-way set associative	8-way set associative	12-way set associative
Line size:	64 bytes	64 bytes	64 bytes	64 bytes
Comments:	Direct-mapped	Direct-mapped	Non-inclusive Direct-mapped	Inclusive Shared between all cores

Instruction set extensions		Additional instructions
MMX		CLFLUSH
SSE		CMOV
SSE2		CMPXCHG16B
SSE3		CMPXCHG8B
SSSE3		Enhanced REP MOVSB/STOSB
SSE4.1		FXSAVE/FXRSTORE
SSE4.2		MONITOR/MWAIT
AVX		PCLMULDQ
F16C		POPCNT
		RD/WR FSGSBASE instructions
		RDTSCP
		SYSENTER/SYSEXIT
		XSAVE/XRESTORE states
Major features		Other features
On-chip Floating Point Unit		36-bit page-size extensions
64-bit / Intel 64		64-bit debug store
NX bit/XD-bit		Advanced programmable interrupt controller
Hyper-Threading Technology		CPL qualified debug store
Intel Virtualization		Clock modulation duty cycle extension
Enhanced SpeedStep		Debug store
		Debugging extensions
		Digital Thermal Sensor capability
		LAHF/SAHF support in 64-bit mode
		Machine check architecture
		Machine check exception
		Memory-type range registers
		Model-specific registers
		Package thermal management
		Page attribute table
		Page global extension
		Page-size extensions (4MB pages)
		Pending break enable
		Perfmon and Debug capability
		Physical address extensions
		Power Limit Notification capability
		Process context identifiers
		Self-snoop
		Supervisor Mode Execution Protection
		TSC rate is ensured to be invariant across all states
		Thermal monitor
		Thermal monitor 2
		Thermal monitor and software controlled clock facilities
		Time stamp counter
		Timestamp counter deadline
		Virtual 8086-mode enhancements
		xTPR Update Control